Q8L( ',Qualcomm Technologies, Inc. SM8550 HDK2qcom,sm8550-hdkqcom,sm8550 =embeddedchosenJserial0:115200n8clocksxo-board 2fixed-clockVcssleep-clk 2fixed-clockVcs*bi-tcxo-div2-clkV2fixed-factor-clock{s)bi-tcxo-ao-div2-clkV2fixed-factor-clock{scpus cpu@0cpu2arm,cortex-a510{pscipsci d%sl2-cache2cache4@sl3-cache2cache4@scpu@100cpu2arm,cortex-a510{pscipsci d%sl2-cache2cache4@scpu@200cpu2arm,cortex-a510{psci  psci d%sl2-cache2cache4@s cpu@300cpu2arm,cortex-a715{psci  psci %sl2-cache2cache4@s cpu@400cpu2arm,cortex-a715{psci psci %sl2-cache2cache4@s cpu@500cpu2arm,cortex-a710{pscipsci %sl2-cache2cache4@scpu@600cpu2arm,cortex-a710{pscipsci %sl2-cache2cache4@scpu@700cpu2arm,cortex-x3{pscipscif L%sl2-cache2cache4@scpu-mapcluster0core0Ncore1Ncore2Ncore3Ncore4Ncore5Ncore6Ncore7Nidle-statesRpscicpu-sleep-0-02arm,idle-state_silver-rail-power-collapseo@&,s"cpu-sleep-1-02arm,idle-state_gold-rail-power-collapseo@Xs#cpu-sleep-2-02arm,idle-state_goldplus-rail-power-collapseo@F8s$domain-idle-statescluster-sleep-02domain-idle-stateoAD .#s%cluster-sleep-12domain-idle-stateoAD 0's&firmwarescm2qcom,scm-sm8550qcom,scminterconnect-02qcom,sm8550-clk-virt s2interconnect-12qcom,sm8550-mc-virt smemory@a0000000memorypmu-a5102arm,cortex-a510-pmu  pmu-a7102arm,cortex-a710-pmu  pmu-a7152arm,cortex-a715-pmu  pmu-x32arm,cortex-x3-pmu  psci 2arm,psci-1.0smcpower-domain-cpu0!*"spower-domain-cpu1!*"spower-domain-cpu2!*"s power-domain-cpu3!*#s power-domain-cpu4!*#spower-domain-cpu5!*#spower-domain-cpu6!*#spower-domain-cpu7!*$spower-domain-cluster*%&s!reserved-memory =hyp-region@80000000Dcpusys-vm-region@80a00000@Dhyp-tags-region@80e00000=Dxbl-sc-region@d8100000Dhyp-tags-reserved-region@811d0000Dxbl-dt-log-merged-region@81a00000&Daop-cmd-db-region@81c60000 2qcom,cmd-dbDaop-config-merged-region@81c80000@Dsmem@81d00000 2qcom,smem K'Dadsp-mhi-region@81f00000Dglobal-sync-region@82600000`Dtz-stat-region@82700000pDcdsp-secure-heap-region@82800000`Dmpss-region@8a800000Dsq6-mpss-dtb-region@9b000000Dsipa-fw-region@9b080000Dsipa-gsi-region@9b090000 Dgpu-micro-code-region@9b09a000 Dsspss-region@9b100000Dspu-tz-shared-region@9b280000(Dspu-modem-shared-region@9b2e0000.Dcamera-region@9b3000000Dvideo-region@9bb00000pDcvp-region@9c200000 pDcdsp-region@9c900000Dsq6-cdsp-dtb-region@9e900000Dsq6-adsp-dtb-region@9e980000Dsadspslpi-region@9ea00000Dsrmtfs-region@d4a800002qcom,rmtfs-memԨ(DSbmpss-dsm-region@d4d000000Dstz-reserved-region@d8000000Dcpucp-fw-region@d8140000Dqtee-region@d83000000PDta-region@d8800000؀Dtz-tags-region@e1200000 tDhwfence-shbuf-region@e6440000D'Dtrust-ui-vm-region@f3600000`Dtrust-ui-vm-dump-region@f80ee000Dtrust-ui-vm-qrt-region@f80ef000Dtrust-ui-vm-vblk0-ring-region@f80f8000@Dtrust-ui-vm-vblk1-ring-region@f80fc000@Dtrust-ui-vm-swiotlb-region@f8100000Doem-vm-region@f8400000@Doem-vm-vblk0-ring-region@fcc00000@Doem-vm-swiotlb-region@fcc04000@Dhyp-ext-tags-region@fce00000Dhyp-ext-reserved-region@ff700000pDsmp2p-adsp 2qcom,smp2plv( (master-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-cdsp 2qcom,smp2pl^v( (master-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-modem 2qcom,smp2plv( (master-kernelmaster-kernelsslave-kernel slave-kernelsipa-ap-to-modemipasipa-modem-to-apipassoc@0 2simple-bus= clock-controller@1000002qcom,sm8550-gccBV<{)*+,,---.s0mailbox@4080002qcom,sm8550-ipccqcom,ipcc@  s(dma-controller@800000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma! LMNOPQRSTUVW, 9> J/6Q ^disableds5geniqup@8c00002qcom,geni-se-qup = em-ahbs-ahb{00 J/#Q ^okayi2c@8800002qcom,geni-i2c@ese{0oqdefault1  u H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8800002qcom,geni-spi@ese{0o  uqdefault67H2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@8840002qcom,geni-i2c@@ese{0qqdefault8  G H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8840002qcom,geni-spi@@ese{0q  Gqdefault9:H2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@8880002qcom,geni-i2c@ese{0sqdefault;  H H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8880002qcom,geni-spi@ese{0s  Hqdefault<=H2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@88c0002qcom,geni-i2c@ese{0uqdefault>  I H2234qup-corequp-configqup-memory 55txrx ^disabledspi@88c0002qcom,geni-spi@ese{0u  Iqdefault?@H2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@8900002qcom,geni-i2c@ese{0wqdefaultA  J H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8900002qcom,geni-spi@ese{0w  JqdefaultBCH2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@8940002qcom,geni-i2c@@ese{0yqdefaultD  K H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8940002qcom,geni-spi@@ese{0y  KqdefaultEFH2234qup-corequp-configqup-memory 55txrx  ^disabledserial@8980002qcom,geni-uart@ese{0{qdefaultGH  02234qup-corequp-config^okaybluetooth2qcom,wcn7850-btIJKLMN O0i2c@89c0002qcom,geni-i2c@ese{0}qdefaultP   H2234qup-corequp-configqup-memory 55txrx ^disabledspi@89c0002qcom,geni-spi@ese{0}  qdefaultQRH2234qup-corequp-configqup-memory 55txrx  ^disabledgeniqup@9c00002qcom,geni-se-i2c-master-hub es-ahb{0Z =^okayi2c@9800002qcom,geni-i2c-master-hub@esecore{0F0EqdefaultS   02234qup-corequp-config ^disabledi2c@9840002qcom,geni-i2c-master-hub@@esecore{0H0EqdefaultT   02234qup-corequp-config ^disabledi2c@9880002qcom,geni-i2c-master-hub@esecore{0J0EqdefaultU   02234qup-corequp-config^okaytypec-mux@42 2fcs,fsa4480B%V0<portendpointOWsi2c@98c0002qcom,geni-i2c-master-hub@esecore{0L0EqdefaultX   02234qup-corequp-config ^disabledi2c@9900002qcom,geni-i2c-master-hub@esecore{0N0EqdefaultY   02234qup-corequp-config ^disabledi2c@9940002qcom,geni-i2c-master-hub@@esecore{0P0EqdefaultZ   02234qup-corequp-config ^disabledi2c@9980002qcom,geni-i2c-master-hub@esecore{0R0Eqdefault[   02234qup-corequp-config ^disabledi2c@99c0002qcom,geni-i2c-master-hub@esecore{0T0Eqdefault\   02234qup-corequp-config ^disabledi2c@9a00002qcom,geni-i2c-master-hub@esecore{0V0Eqdefault]   02234qup-corequp-config ^disabledi2c@9a40002qcom,geni-i2c-master-hub@@esecore{0X0Eqdefault^   02234qup-corequp-config ^disableddma-controller@a00000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma! %&'()*, 9 J/Q^okaysageniqup@ac00002qcom,geni-se-qup = em-ahbs-ahb{00 J/22 qup-coreQ ^okayi2c@a800002qcom,geni-i2c@ese{0]qdefault_  a H2234`qup-corequp-configqup-memory aatxrx^okaychdmi-bridge@2b2lontium,lt9611uxc+ vb _bkc%defqdefaultports port@0endpointOgsport@2endpointOhsspi@a800002qcom,geni-spi@ese{0]  aqdefaultijH2234`qup-corequp-configqup-memory aatxrx  ^disabledi2c@a840002qcom,geni-i2c@@ese{0_qdefaultk  b H2234`qup-corequp-configqup-memory aatxrx ^disabledspi@a840002qcom,geni-spi@@ese{0_  bqdefaultlmH2234`qup-corequp-configqup-memory aatxrx  ^disabledi2c@a880002qcom,geni-i2c@ese{0aqdefaultn  c H2234`qup-corequp-configqup-memory aatxrx ^disabledspi@a880002qcom,geni-spi@ese{0a  cqdefaultopH2234`qup-corequp-configqup-memory aatxrx  ^disabledi2c@a8c0002qcom,geni-i2c@ese{0cqdefaultq  d H2234`qup-corequp-configqup-memory aatxrx ^disabledspi@a8c0002qcom,geni-spi@ese{0c  dqdefaultrsH2234`qup-corequp-configqup-memory aatxrx  ^disabledi2c@a900002qcom,geni-i2c@ese{0eqdefaultt  e H2234`qup-corequp-configqup-memory aatxrx ^disabledspi@a900002qcom,geni-spi@ese{0e  eqdefaultuvH2234`qup-corequp-configqup-memory aatxrx  ^disabledi2c@a940002qcom,geni-i2c@@ese{0gqdefaultw  fH2234`qup-corequp-configqup-memory aatxrx  ^disabledspi@a940002qcom,geni-spi@@ese{0g  fqdefaultxyH2234`qup-corequp-configqup-memory aatxrx  ^disabledi2c@a980002qcom,geni-i2c@ese{0iqdefaultz  kH2234`qup-corequp-configqup-memory aatxrx  ^disabledspi@a980002qcom,geni-spi@ese{0i  kqdefault{|H2234`qup-corequp-configqup-memory aatxrx  ^disabledserial@a9c0002qcom,geni-debug-uart@ese{0kqdefault}  Cqup-corequp-config02234^okayinterconnect@15000002qcom,sm8550-cnoc-mainP0 sinterconnect@16000002qcom,sm8550-config-noc`b s4interconnect@16800002qcom,sm8550-system-nochЀ interconnect@16c00002qcom,sm8550-pcie-anocl"{00  s~interconnect@16e00002qcom,sm8550-aggre1-nocnD{00 s`interconnect@17000002qcom,sm8550-aggre2-nocp{  sinterconnect@17800002qcom,sm8550-mmss-nocx srng@10c30002qcom,sm8550-trngqcom,trng 0pcie@1c00000pci2qcom,pcie-sm8550P0`` ``vparfdbielbiatuconfig 8=` `0`0Q` (msi0msi1msi2msi3msi4msi5msi6msi78{0"0$0%0*0+00=eauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr0~3pcie-memcpu-pcie  //0pci0+pciephy^okay  b` b^qdefaultpcie@0pci =wifi@0 2pci17cb,1107IJKLMN O!3phy@1c06000 2qcom,sm8550-qmp-gen3x2-pcie-phy` ({0"0$0&0(eauxcfg_ahbrefrchngpipe0phyE0&U0Vjpcie0_pipe_clk}^okays+pcie@1c08000pci2qcom,pcie-sm8550P0@@ @@vparfdbielbiatuconfig 8=@ @0@0Q` 34589:vw(msi0msi1msi2msi3msi4msi5msi6msi7@{0,0.0/0607000 Ieauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axiE0,U$0~3 pcie-memcpu-pcie  //00 pcilink_down0,pciephy^okay  bc baqdefaultpcie@0pci =phy@1c0e000 2qcom,sm8550-qmp-gen4x2-pcie-phy ({000.0204eauxcfg_ahbrefrchngpipe0 0 phyphy_nocsrE02U0Vjpcie1_pipe_clk}^okays,dma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0@  !J//scrypto@1dfa000)2qcom,sm8550-qceqcom,sm8150-qceqcom,qceߠ`rxtxJ//memoryphy@1d800002qcom,sm8550-qmp-ufs-phy {0erefref_auxqref0ufsphyV}^okays-ufs@1d84000+2qcom,sm8550-ufshcqcom,ufshcjedec,ufs-2.0@0   -ufsphy0rst0 J/`Q0`34#ufs-ddrcpu-ufsnecore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@{0000000*^okay _b%3 DPObsopp-table2operating-points-v2sopp-75000000@qxhxhopp-150000000@qррopp-300000000@qcrypto@1d88000;2qcom,sm8550-inline-crypto-engineqcom,inline-crypto-engine؀{0shwlock@1f400002qcom,tcsr-mutexxs'clock-controller@1fc00002qcom,sm8550-tcsrsyscon{Vsgpu@3d00000!2qcom,adreno-43050a01qcom,adreno0#vkgsl_3d0_reg_memorycx_memcx_dbgc  ,J%^okayszap-shaderqcom/sm8550/a740_zap.mbnopp-table2operating-points-v2sopp-680000000q(opp-615000000q$'opp-550000000q Uopp-475000000qOPopp-401000000q@@opp-348000000q<opp-295000000qW8opp-220000000q 4gmu@3d6a000&2qcom,adreno-gmu-740.1qcom,adreno-gmu0֠P (vgmursccgmu_pdc 01hfigmu8{0 0 !eahbgmucxoaximemnochubdemetcxgx Jsopp-table2operating-points-v2sopp-500000000qeopp-200000000q @clock-controller@3d900002qcom,sm8550-gpucc{)00Vsiommu@3da0000@2qcom,sm8550-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-5008 >?@A { 0 0!ehlosbusifaceahbQsipa@3f400002qcom,sm8550-ipaJ//0P@vipa-regipa-sharedgsi8v(ipagsiipa-clock-queryipa-setup-ready{ ecore034memoryconfig*ipa-clock-enabled-validipa-clock-enabled^okayselfqcom/sm8550/ipa_fws.mbnremoteproc@40800002qcom,sm8550-mpss-pasLv0wdogfatalreadyhandoverstop-ackshutdown-ack{exo cxmss stop^okay0qcom/sm8550/modem.mbnqcom/sm8550/modem_dtb.mbnglink-edgev( (mpssremoteproc@68000002qcom,sm8550-adsp-pas<v#wdogfatalreadyhandoverstop-ack{exolcxlmxstop^okay.qcom/sm8550/adsp.mbnqcom/sm8550/adsp_dtb.mbnglink-edgev( (lpassfastrpc 2qcom,fastrpcfastrpcglink-apps-dspadsp/ compute-cb@32qcom,fastrpc-compute-cbJ//cQcompute-cb@42qcom,fastrpc-compute-cbJ//dQcompute-cb@52qcom,fastrpc-compute-cbJ//eQcompute-cb@62qcom,fastrpc-compute-cbJ//fQcompute-cb@72qcom,fastrpc-compute-cbJ//gQgpr 2qcom,gpr adsp_appsFR service@1 2qcom,q6apm_pavs/audiomsm/adsp/audio_pdsdais2qcom,q6apm-daisJ//abedais2qcom,q6apm-lpass-dais_sservice@2 2qcom,q6prmpavs/audiomsm/adsp/audio_pdclock-controller2qcom,q6prm-lpass-clocksVscodec@6aa00002qcom,sm8550-lpass-wsa-macro({DfgemclkmacrodcodecfsgenV jwsa2-mclk_ssoundwire@6ab00002qcom,soundwire-v2.0.0  {eifaceWSA2qdefault ??        6 S _ ^disabledcodec@6ac00002qcom,sm8550-lpass-rx-macro({@fgemclkmacrodcodecfsgenVjmclk_ssoundwire@6ad00002qcom,soundwire-v2.0.0  {eifaceRXqdefault ?         6 S _^okayscodec@0,42sdw20217010d00kscodec@6ae00002qcom,sm8550-lpass-tx-macro({9fgemclkmacrodcodecfsgenVjmclk_scodec@6b000002qcom,sm8550-lpass-wsa-macro({BfgemclkmacrodcodecfsgenVjmclk_ssoundwire@6b100002qcom,soundwire-v2.0.0  {eifaceWSAqdefault ??        6 S _^okays#speaker@0,02sdw20217020400qdefault _ SpkrLeft s!speaker@0,12sdw20217020400qdefault _ SpkrRight s"soundwire@6d300002qcom,soundwire-v2.0.0  corewakeup{eifaceTXqdefault6S _^okays codec@0,32sdw20217010d00scodec@6d440002qcom,sm8550-lpass-va-macro@${9fgemclkmacrodcodecVjfsgen_spinctrl@6e800002qcom,sm8550-lpass-lpi-pinctrl %  {fg ecoreaudiostx-swr-active-statesclk-pins 'gpio0 ,swr_tx_clk 5 D Ndata-pins 'gpio1gpio2gpio14 ,swr_tx_data 5 D [rx-swr-active-statesclk-pins 'gpio3 ,swr_rx_clk 5 D Ndata-pins 'gpio4gpio5 ,swr_rx_data 5 D [dmic01-default-stateclk-pins 'gpio6 ,dmic1_clk 5 idata-pins 'gpio7 ,dmic1_data 5 udmic23-default-stateclk-pins 'gpio8 ,dmic2_clk 5 idata-pins 'gpio9 ,dmic2_data 5 uwsa-swr-active-statesclk-pins 'gpio10 ,wsa_swr_clk 5 D Ndata-pins 'gpio11 ,wsa_swr_data 5 D [wsa2-swr-active-statesclk-pins 'gpio15 ,wsa2_swr_clk 5 D Ndata-pins 'gpio16 ,wsa2_swr_data 5 D [spkr-1-sd-n-active-state 'gpio17 ,gpio 5 N sspkr-2-sd-n-active-state 'gpio18 ,gpio 5 N sinterconnect@74000002qcom,sm8550-lpass-lpiaon-noc@ interconnect@74300002qcom,sm8550-lpass-lpicx-nocC sinterconnect@7e400002qcom,sm8550-lpass-ag-noc mmc@8804000$2qcom,sm8550-sdhciqcom,sdhci-msm-v5@ hc_irqpwr_irq{00eifacecorexo J/@ d, h034sdhc-ddrcpu-sdhc Q ^okay  qdefaultsleep    opp-table2operating-points-v2sopp-19200000q$opp-50000000qopp-100000000qopp-202000000q Fclock-controller@aaf00002qcom,sm8550-videocc  {)0Vcci@ac15000!2qcom,sm8550-cciqcom,msm8996-cci P  {ecamnoc_axicpas_ahbcci qdefaultsleep ^disabled i2c-bus@0cB@ i2c-bus@1cB@ cci@ac16000!2qcom,sm8550-cciqcom,msm8996-cci `  { ecamnoc_axicpas_ahbcci qdefaultsleep ^disabled i2c-bus@0cB@ cci@ac17000!2qcom,sm8550-cciqcom,msm8996-cci p  { ecamnoc_axicpas_ahbcci qdefaultsleep ^disabled i2c-bus@0cB@ i2c-bus@1cB@ clock-controller@ade00002qcom,sm8550-camcc {0)*Vsdisplay-subsystem@ae000002qcom,sm8550-mdss vmdss  S {00= mdp0-mem J/ =^okaysdisplay-controller@ae010002qcom,sm8550-dpu   vmdpvbif 0{00@=I!ebusnrt_busifacelutcorevsyncEIU$ports port@0endpointOsport@1endpointOsport@2endpointOsopp-table2operating-points-v2sopp-200000000q opp-325000000q_@opp-375000000qZ opp-514000000qdisplayport-controller@ae900002qcom,sm8550-dpqcom,sm8350-dpP      ({ ;ecore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelE ...dp_^okayports port@0endpointOsport@1endpointO sopp-table2operating-points-v2sopp-162000000q opp-270000000q߀opp-540000000q /opp-810000000q0Gdsi@ae94000(2qcom,sm8550-dsi-ctrlqcom,mdss-dsi-ctrl @ vdsi_ctrl 0{B80$ebytebyte_intfpixelcoreifacebusEC dsi ^okay $ports port@0endpointOsport@1endpointO sgopp-table2operating-points-v2sopp-187500000q -opp-300000000qopp-358000000qVphy@ae950002qcom,sm8550-dsi-phy-4nm0 P R Uvdsi_phydsi_phy_lanedsi_pll{ eifacerefV}^okay 0sdsi@ae96000(2qcom,sm8550-dsi-ctrlqcom,mdss-dsi-ctrl ` vdsi_ctrl 0{ D:0$ebytebyte_intfpixelcoreifacebusE E dsi  ^disabledports port@0endpointOsport@1endpointphy@ae970002qcom,sm8550-dsi-phy-4nm0 p r uvdsi_phydsi_phy_lanedsi_pll{ eifacerefV} ^disabledsclock-controller@af000002qcom,sm8550-dispcc \{)0*..Vsphy@88e30002qcom,sm8550-snps-eusb2-phy0T}{eref0^okayk <sphy@88e80002qcom,sm8550-qmp-usb3-dp-phy0 {000eauxrefcom_auxusb3_pipe000 phycommonV}<^okays.ports port@0endpointOsport@1endpointOsport@2endpointOsusb@a6f88002qcom,sm8550-dwc3qcom,dwc3 o =0{0 0000&ecfg_noccoreifacesleepmock_utmixoE00U$ Dv<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq000`34$usb-ddrapps-usb^okayusb@a600000 2snps,dwc3 `   J/@ .usb2-phyusb3-phy J ^ {        5Q Dports port@0endpointOsport@1endpointOsinterrupt-controller@b2200002qcom,sm8550-pdcqcom,pdc "@d< T^^a}?~ sthermal-sensor@c271000 2qcom,sm8550-tsensqcom,tsens-v2 ' "  d uplowcritical rsthermal-sensor@c272000 2qcom,sm8550-tsensqcom,tsens-v2 '  "0 d uplowcritical rsthermal-sensor@c273000 2qcom,sm8550-tsensqcom,tsens-v2 '0 "@ d uplowcritical rspower-management@c300000#2qcom,sm8550-aoss-qmpqcom,aoss-qmp 0(v( (Vssram@c3f00002qcom,rpmh-stats ?spmi@c4000002qcom,spmi-pmic-arbP @0 P@ D L B@vcorechnlsobsrvrintrcnfg periph_irq v   pmic@c2qcom,pm8010qcom,spmi-pmic  temp-alarm@24002qcom,spmi-temp-alarm$ $ rspmic@d2qcom,pm8010qcom,spmi-pmic  temp-alarm@24002qcom,spmi-temp-alarm$ $ rs pmic@12qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    rs gpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio   ssdc2-card-det-state 'gpio12 ,normal u   svolume-up-n-state 'gpio6 ,normal   usled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led ^disabledpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm ^okay led@1 ,status  offled@2 ,status  offled@3 ,status  offpmic@72qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    rs gpio@8800!2qcom,pm8550b-gpioqcom,spmi-gpio   sphy@fd002qcom,pm8550b-eusb2-repeater}  spmic@52qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    rs gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio  spmic@22qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    rs gpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio  spmic@32qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    rsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio  spmic@42qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    rsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio  spmic@62qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    rsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio  spmic@02qcom,pm8550qcom,spmi-pmic pon@13002qcom,pmk8350-pon vhlospbspwrkey2qcom,pmk8350-pwrkey  t^okayresin2qcom,pmk8350-resin ^okay rrtc@61002qcom,pmk8350-rtcab vrtcalarm bnvram@71002qcom,spmi-sdamq  =qreboot-reason@48H sgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio  ssleep-clk-state 'gpio3 ,func1   N s&pmic@a2qcom,pmr735dqcom,spmi-pmic  temp-alarm@a002qcom,spmi-temp-alarm   rsgpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpio  spinctrl@f1000002qcom,sm8550-tlmm0    b . < sbcci0-0-default-statessda-pins 'gpio110 ,cci_i2c_sda 5 scl-pins 'gpio111 ,cci_i2c_scl 5 cci0-0-sleep-statessda-pins 'gpio110 ,cci_i2c_sda 5 Qscl-pins 'gpio111 ,cci_i2c_scl 5 Qcci0-1-default-statessda-pins 'gpio112 ,cci_i2c_sda 5 scl-pins 'gpio113 ,cci_i2c_scl 5 cci0-1-sleep-statessda-pins 'gpio112 ,cci_i2c_sda 5 Qscl-pins 'gpio113 ,cci_i2c_scl 5 Qcci1-0-default-statessda-pins 'gpio114 ,cci_i2c_sda 5 scl-pins 'gpio115 ,cci_i2c_scl 5 cci1-0-sleep-statessda-pins 'gpio114 ,cci_i2c_sda 5 Qscl-pins 'gpio115 ,cci_i2c_scl 5 Qcci2-0-default-statessda-pins 'gpio74 ,cci_i2c_sda 5 scl-pins 'gpio75 ,cci_i2c_scl 5 cci2-0-sleep-statessda-pins 'gpio74 ,cci_i2c_sda 5 Qscl-pins 'gpio75 ,cci_i2c_scl 5 Qcci2-1-default-statessda-pins 'gpio0 ,cci_i2c_sda 5 scl-pins 'gpio1 ,cci_i2c_scl 5 cci2-1-sleep-statessda-pins 'gpio0 ,cci_i2c_sda 5 Qscl-pins 'gpio1 ,cci_i2c_scl 5 Qhub-i2c0-data-clk-state 'gpio16gpio17 ,i2chub0_se0 5 sShub-i2c1-data-clk-state 'gpio18gpio19 ,i2chub0_se1 5 sThub-i2c2-data-clk-state 'gpio20gpio21 ,i2chub0_se2 5 sUhub-i2c3-data-clk-state 'gpio22gpio23 ,i2chub0_se3 5 sXhub-i2c4-data-clk-state 'gpio4gpio5 ,i2chub0_se4 5 sYhub-i2c5-data-clk-state 'gpio6gpio7 ,i2chub0_se5 5 sZhub-i2c6-data-clk-state 'gpio8gpio9 ,i2chub0_se6 5 s[hub-i2c7-data-clk-state 'gpio10gpio11 ,i2chub0_se7 5 s\hub-i2c8-data-clk-state 'gpio206gpio207 ,i2chub0_se8 5 s]hub-i2c9-data-clk-state 'gpio84gpio85 ,i2chub0_se9 5 s^pcie0-default-statesperst-pins 'gpio94 ,gpio 5 Qclkreq-pins 'gpio95 ,pcie0_clk_req_n 5 wake-pins 'gpio96 ,gpio 5 pcie1-default-statesperst-pins 'gpio97 ,gpio 5 Qclkreq-pins 'gpio98 ,pcie1_clk_req_n 5 wake-pins 'gpio99 ,gpio 5 qup-i2c0-data-clk-state 'gpio28gpio29 ,qup1_se0 5 s_qup-i2c1-data-clk-state 'gpio32gpio33 ,qup1_se1 5 skqup-i2c2-data-clk-state 'gpio36gpio37 ,qup1_se2 5 snqup-i2c3-data-clk-state 'gpio40gpio41 ,qup1_se3 5 sqqup-i2c4-data-clk-state 'gpio44gpio45 ,qup1_se4 5 stqup-i2c5-data-clk-state 'gpio52gpio53 ,qup1_se5 5 swqup-i2c6-data-clk-state 'gpio48gpio49 ,qup1_se6 5 szqup-i2c8-data-clk-states1scl-pins 'gpio57 ,qup2_se0_l1_mira 5 sda-pins 'gpio56 ,qup2_se0_l0_mira 5 qup-i2c9-data-clk-state 'gpio60gpio61 ,qup2_se1 5 s8qup-i2c10-data-clk-state 'gpio64gpio65 ,qup2_se2 5 s;qup-i2c11-data-clk-state 'gpio68gpio69 ,qup2_se3 5 s>qup-i2c12-data-clk-state 'gpio2gpio3 ,qup2_se4 5 sAqup-i2c13-data-clk-state 'gpio80gpio81 ,qup2_se5 5 sDqup-i2c15-data-clk-state 'gpio72gpio106 ,qup2_se7 5 sPqup-spi0-cs-state 'gpio31 ,qup1_se0 5 Nsjqup-spi0-data-clk-state 'gpio28gpio29gpio30 ,qup1_se0 5 Nsiqup-spi1-cs-state 'gpio35 ,qup1_se1 5 Nsmqup-spi1-data-clk-state 'gpio32gpio33gpio34 ,qup1_se1 5 Nslqup-spi2-cs-state 'gpio39 ,qup1_se2 5 Nspqup-spi2-data-clk-state 'gpio36gpio37gpio38 ,qup1_se2 5 Nsoqup-spi3-cs-state 'gpio43 ,qup1_se3 5 Nssqup-spi3-data-clk-state 'gpio40gpio41gpio42 ,qup1_se3 5 Nsrqup-spi4-cs-state 'gpio47 ,qup1_se4 5 Nsvqup-spi4-data-clk-state 'gpio44gpio45gpio46 ,qup1_se4 5 Nsuqup-spi5-cs-state 'gpio55 ,qup1_se5 5 Nsyqup-spi5-data-clk-state 'gpio52gpio53gpio54 ,qup1_se5 5 Nsxqup-spi6-cs-state 'gpio51 ,qup1_se6 5 Ns|qup-spi6-data-clk-state 'gpio48gpio49gpio50 ,qup1_se6 5 Ns{qup-spi8-cs-state 'gpio59 ,qup2_se0_l3_mira 5 Ns7qup-spi8-data-clk-state 'gpio56gpio57gpio58 ,qup2_se0_l2_mira 5 Ns6qup-spi9-cs-state 'gpio63 ,qup2_se1 5 Ns:qup-spi9-data-clk-state 'gpio60gpio61gpio62 ,qup2_se1 5 Ns9qup-spi10-cs-state 'gpio67 ,qup2_se2 5 Ns=qup-spi10-data-clk-state 'gpio64gpio65gpio66 ,qup2_se2 5 Ns<qup-spi11-cs-state 'gpio71 ,qup2_se3 5 Ns@qup-spi11-data-clk-state 'gpio68gpio69gpio70 ,qup2_se3 5 Ns?qup-spi12-cs-state 'gpio119 ,qup2_se4 5 NsCqup-spi12-data-clk-state 'gpio2gpio3gpio118 ,qup2_se4 5 NsBqup-spi13-cs-state 'gpio83 ,qup2_se5 5 NsFqup-spi13-data-clk-state 'gpio80gpio81gpio82 ,qup2_se5 5 NsEqup-spi15-cs-state 'gpio75 ,qup2_se7 5 NsRqup-spi15-data-clk-state 'gpio72gpio106gpio74 ,qup2_se7 5 NsQqup-uart7-default-state 'gpio26gpio27 ,qup1_se7 5 Ns}qup-uart14-default-state 'gpio78gpio79 ,qup2_se6 5 sGqup-uart14-cts-rts-state 'gpio76gpio77 ,qup2_se6 5 QsHsdc2-sleep-statesclk-pins 'sdc2_clk N 5cmd-pins 'sdc2_cmd  5data-pins 'sdc2_data  5sdc2-default-statesclk-pins 'sdc2_clk N 5cmd-pins 'sdc2_cmd  5 data-pins 'sdc2_data  5 bt-default-states%bt-en-pins 'gpio81 ,gpio 5 Nsw-ctrl-pins 'gpio82 ,gpio Qlt9611-irq-state 'gpio8 ,gpio Nselt9611-rst-state 'gpio7 ,gpio isfwcd-reset-n-active-state 'gpio108 ,gpio 5 N swlan-en-state 'gpio80 ,gpio 5 Qs$iommu@15000000/2qcom,sm8550-smmu-500qcom,smmu-500arm,mmu-500 Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYQs/interrupt-controller@17100000 2arm,gic-v3  = ` w    smsi-controller@171400002arm,gic-v3-its  stimer@174200002arm,armv7-timer-memB=  frame@17421000BB   frame@17423000B0    ^disabledframe@17425000BP    ^disabledframe@17427000Bp    ^disabledframe@17429000B    ^disabledframe@1742b000B    ^disabledframe@1742d000B    ^disabledrsc@17a00000 apps_rsc2qcom,rpmh-rsc@vdrv-0drv-1drv-2drv-3$    !bcm-voter2qcom,bcm-voters clock-controller2qcom,sm8550-rpmh-clkVexo{spower-controller2qcom,sm8550-rpmhpdsopp-table2operating-points-v2sopp-16opp-480sopp-524opp-568sopp-60<opp-64@sopp-80Popp-128sopp-144opp-192sopp-256sopp-320@opp-336Popp-384opp-416regulators-02qcom,pm8550-rpmh-regulators    V * 8V JV [V l {   bbob1 vreg_bob1 2K