/home/scole/Downloads/gcc6//GENERIC.SKI/subr_optstr.o: file format elf64-ia64-little Disassembly of section .text: 0000000000000000 <optstr_get>: 0: 09 78 00 40 00 10 [MMI] ld1 r15=[r32] 6: 00 09 80 00 42 40 adds r16=1,r32 c: 00 08 ca 00 mov.i r2=ar.lc;; 10: 01 00 00 00 01 00 [MII] nop.m 0x0 16: f0 00 3c 28 00 00 sxt1 r15=r15 1c: 00 00 04 00 nop.i 0x0;; 20: 11 70 00 1e 00 21 [MIB] mov r14=r15 26: 70 00 3d 0c 73 03 cmp4.eq p7,p6=32,r15 2c: 60 00 00 43 (p06) br.cond.dpnt.few 80 <optstr_get+0x80>;; 30: 08 00 00 00 01 00 [MMI] nop.m 0x0 36: 00 00 00 02 00 00 nop.m 0x0 3c: 00 00 04 00 nop.i 0x0 40: 09 00 01 20 00 21 [MMI] mov r32=r16 46: f0 08 40 00 28 00 ld1 r15=[r16],1 4c: 00 00 04 00 nop.i 0x0;; 50: 01 00 00 00 01 00 [MII] nop.m 0x0 56: f0 00 3c 28 00 00 sxt1 r15=r15 5c: 00 00 04 00 nop.i 0x0;; 60: 11 70 00 1e 00 21 [MIB] mov r14=r15 66: 60 00 3d 0e 73 03 cmp4.eq p6,p7=32,r15 6c: e0 ff ff 4a (p06) br.cond.dptk.few 40 <optstr_get+0x40>;; 70: 08 00 00 00 01 00 [MMI] nop.m 0x0 76: 00 00 00 02 00 00 nop.m 0x0 7c: 00 00 04 00 nop.i 0x0 80: 11 30 00 1c 87 39 [MIB] cmp4.eq p6,p7=0,r14 86: 00 00 00 02 00 03 nop.i 0x0 8c: 90 02 00 43 (p06) br.cond.dpnt.few 310 <optstr_get+0x310>;; 90: 0b 78 00 42 00 10 [MMI] ld1 r15=[r33];; 96: 00 00 00 02 00 e0 nop.m 0x0 9c: 01 78 50 00 sxt1 r15=r15;; a0: 11 30 38 1e 87 38 [MIB] cmp4.eq p6,p7=r14,r15 a6: 30 01 3c 00 c2 03 mov r19=r15 ac: 60 00 00 43 (p07) br.cond.dpnt.few 100 <optstr_get+0x100>;; b0: 09 00 00 00 01 80 [MMI] nop.m 0x0 b6: 11 09 80 00 42 43 (p06) adds r17=1,r32 bc: 12 08 01 84 (p06) adds r18=1,r33;; c0: 08 00 00 00 01 00 [MMI] nop.m 0x0 c6: 00 09 48 00 28 00 ld1 r16=[r18],1 cc: 04 88 00 84 mov r32=r17 d0: 02 78 04 22 00 14 [MII] ld1 r15=[r17],1 d6: 00 00 00 02 00 e0 nop.i 0x0;; dc: 01 78 50 00 sxt1 r15=r15 e0: 02 00 00 00 01 00 [MII] nop.m 0x0 e6: 00 01 40 28 00 c0 sxt1 r16=r16;; ec: 01 78 00 84 mov r14=r15 f0: 19 98 00 20 00 21 [MMB] mov r19=r16 f6: 60 80 3c 0e 71 03 cmp4.eq p6,p7=r16,r15 fc: d0 ff ff 4a (p06) br.cond.dptk.few c0 <optstr_get+0xc0>;; 100: 09 30 f4 1c 87 39 [MMI] cmp4.eq p6,p7=61,r14 106: 00 00 00 02 00 00 nop.m 0x0 10c: 01 98 24 e6 cmp4.eq p8,p9=0,r19;; 110: c9 70 04 00 00 24 [MMI] (p06) mov r14=1 116: 00 00 00 02 00 64 nop.m 0x0 11c: 12 00 00 90 (p08) mov r19=1;; 120: e3 70 00 00 00 61 [MII] (p07) mov r14=r0 126: 32 01 00 00 42 c0 (p09) mov r19=r0;; 12c: 31 71 30 80 and r14=r19,r14;; 130: 10 40 00 1c 00 21 [MIB] mov r8=r14 136: 70 00 38 0c f3 03 cmp4.eq p7,p6=0,r14 13c: 00 01 00 42 (p07) br.cond.dptk.few 230 <optstr_get+0x230> 140: 09 70 fc 47 3f 23 [MMI] adds r14=-1,r35 146: 00 09 80 00 42 00 adds r16=1,r32 14c: 24 00 01 84 adds r32=2,r32;; 150: 09 00 00 00 01 00 [MMI] nop.m 0x0 156: e0 10 39 00 40 00 add r14=r34,r14 15c: 00 00 04 00 nop.i 0x0;; 160: 11 30 38 44 07 38 [MIB] cmp.eq p6,p7=r14,r34 166: f0 10 39 0a 40 03 sub r15=r34,r14 16c: c0 01 00 43 (p06) br.cond.dpnt.few 320 <optstr_get+0x320>;; 170: 09 70 00 20 00 10 [MMI] ld1 r14=[r16] 176: f0 f8 3f 5a 44 00 andcm r15=-1,r15 17c: 12 10 01 84 adds r16=1,r34;; 180: 01 00 00 00 01 00 [MII] nop.m 0x0 186: e0 00 38 28 00 00 sxt1 r14=r14 18c: 00 00 04 00 nop.i 0x0;; 190: 01 00 00 00 01 00 [MII] nop.m 0x0 196: 00 78 04 55 00 e0 mov.i ar.lc=r15 19c: f1 75 b0 88 and r15=-33,r14;; 1a0: 11 38 00 1e 86 39 [MIB] cmp4.eq p7,p6=0,r15 1a6: 00 00 00 02 80 03 nop.i 0x0 1ac: 80 01 00 43 (p07) br.cond.dpnt.few 320 <optstr_get+0x320>;; 1b0: 10 00 38 44 80 11 [MIB] st1 [r34]=r14 1b6: 00 00 00 02 00 a0 nop.i 0x0 1bc: 30 00 00 40 br.cloop.sptk.few 1e0 <optstr_get+0x1e0> 1c0: 09 00 00 20 80 11 [MMI] st1 [r16]=r0 1c6: 00 00 00 02 00 00 nop.m 0x0 1cc: 00 00 04 00 nop.i 0x0;; 1d0: 10 00 00 00 01 00 [MIB] nop.m 0x0 1d6: 00 10 04 55 00 80 mov.i ar.lc=r2 1dc: 08 00 84 00 br.ret.sptk.many b0 1e0: 09 70 04 40 00 14 [MMI] ld1 r14=[r32],1 1e6: 00 00 00 02 00 40 nop.m 0x0 1ec: 04 80 00 84 mov r34=r16;; 1f0: 03 00 00 00 01 00 [MII] nop.m 0x0 1f6: e0 00 38 28 00 e0 sxt1 r14=r14;; 1fc: f1 75 b0 88 and r15=-33,r14;; 200: 11 38 00 1e 86 39 [MIB] cmp4.eq p7,p6=0,r15 206: 00 00 00 02 80 03 nop.i 0x0 20c: c0 ff ff 4b (p07) br.cond.dpnt.few 1c0 <optstr_get+0x1c0>;; 210: 10 00 38 44 80 11 [MIB] st1 [r34]=r14 216: 00 09 88 00 42 a0 adds r16=1,r34 21c: d0 ff ff 48 br.cloop.sptk.few 1e0 <optstr_get+0x1e0> 220: 11 00 00 00 01 00 [MIB] nop.m 0x0 226: 00 00 00 02 00 00 nop.i 0x0 22c: a0 ff ff 48 br.few 1c0 <optstr_get+0x1c0>;; 230: 09 70 00 40 00 10 [MMI] ld1 r14=[r32] 236: 00 00 00 02 00 00 nop.m 0x0 23c: 12 00 01 84 adds r16=1,r32;; 240: 03 00 00 00 01 00 [MII] nop.m 0x0 246: e0 00 38 28 00 e0 sxt1 r14=r14;; 24c: f1 75 b0 88 and r15=-33,r14;; 250: 11 00 00 00 01 00 [MIB] nop.m 0x0 256: 60 00 3c 0e 73 03 cmp4.eq p6,p7=0,r15 25c: 40 00 00 43 (p06) br.cond.dpnt.few 290 <optstr_get+0x290>;; 260: 09 00 01 20 00 21 [MMI] mov r32=r16 266: e0 08 40 00 28 00 ld1 r14=[r16],1 26c: 00 00 04 00 nop.i 0x0;; 270: 03 00 00 00 01 00 [MII] nop.m 0x0 276: e0 00 38 28 00 e0 sxt1 r14=r14;; 27c: f1 75 b0 88 and r15=-33,r14;; 280: 11 00 00 00 01 00 [MIB] nop.m 0x0 286: 70 00 3c 0c 73 03 cmp4.eq p7,p6=0,r15 28c: e0 ff ff 4a (p06) br.cond.dptk.few 260 <optstr_get+0x260>;; 290: 11 80 04 40 00 21 [MIB] adds r16=1,r32 296: 70 00 39 0c 73 03 cmp4.eq p7,p6=32,r14 29c: f0 fd ff 4b (p06) br.cond.dpnt.few 80 <optstr_get+0x80>;; 2a0: 09 00 01 20 00 21 [MMI] mov r32=r16 2a6: f0 08 40 00 28 00 ld1 r15=[r16],1 2ac: 00 00 04 00 nop.i 0x0;; 2b0: 01 00 00 00 01 00 [MII] nop.m 0x0 2b6: f0 00 3c 28 00 00 sxt1 r15=r15 2bc: 00 00 04 00 nop.i 0x0;; 2c0: 11 70 00 1e 00 21 [MIB] mov r14=r15 2c6: 60 00 3d 0e f3 03 cmp4.eq p6,p7=32,r15 2cc: c0 fd ff 4b (p07) br.cond.dpnt.few 80 <optstr_get+0x80>;; 2d0: 09 00 01 20 00 21 [MMI] mov r32=r16 2d6: f0 08 40 00 28 00 ld1 r15=[r16],1 2dc: 00 00 04 00 nop.i 0x0;; 2e0: 01 00 00 00 01 00 [MII] nop.m 0x0 2e6: f0 00 3c 28 00 00 sxt1 r15=r15 2ec: 00 00 04 00 nop.i 0x0;; 2f0: 10 70 00 1e 00 21 [MIB] mov r14=r15 2f6: 60 00 3d 0e 73 03 cmp4.eq p6,p7=32,r15 2fc: b0 ff ff 4a (p06) br.cond.dptk.few 2a0 <optstr_get+0x2a0> 300: 10 00 00 00 01 00 [MIB] nop.m 0x0 306: 00 00 00 02 00 00 nop.i 0x0 30c: 80 fd ff 48 br.few 80 <optstr_get+0x80> 310: 10 40 00 00 00 21 [MIB] mov r8=r0 316: 00 10 04 55 00 80 mov.i ar.lc=r2 31c: 08 00 84 00 br.ret.sptk.many b0 320: 09 00 00 00 01 00 [MMI] nop.m 0x0 326: 00 01 88 00 42 00 mov r16=r34 32c: 00 00 04 00 nop.i 0x0;; 330: 11 00 00 20 80 11 [MIB] st1 [r16]=r0 336: 00 00 00 02 00 00 nop.i 0x0 33c: a0 fe ff 48 br.few 1d0 <optstr_get+0x1d0>;; Disassembly of section .ident: 0000000000000000 <.ident>: 0: 24 4e 65 74 42 53 [MLX] (p49) ld1.c.clr.acq.nt1 r41=[r58],r25 6: 44 3a 20 73 75 62 data8 0xe0debee4c4 c: 72 5f 6f 70 10: 74 73 74 72 2e 63 [-a-] data8 0x1197393a39b 16: 2c 76 20 31 2e 36 data8 0xb8c481d8b1 1c: 20 32 30 31 data8 0x626064406c 20: 36 2f 30 35 2f 33 [BBB] data8 0x19979a98179 26: 30 20 31 31 3a 32 brp.sptk.imp 626260 <_KERNEL_OPT_MAXUSERS+0x626240>,50 <_KERNEL_OPT_MAXUSERS+0x30> 2c: 34 3a 34 30 data8 0x6068746864 30: Address 0x0000000000000030 is out of bounds. Disassembly of section .IA_64.unwind_info: 0000000000000000 <.IA_64.unwind_info>: 0: 01 00 00 00 00 00 [MII] break.m 0x0 6: 01 00 03 ea 02 b2 data8 0xba80c0004 c: 82 61 99 01 (p36) chk.s.i r24,996150 <_KERNEL_OPT_MAXUSERS+0x996130>;; Disassembly of section .IA_64.unwind: 0000000000000000 <.IA_64.unwind>: ... Disassembly of section .comment: 0000000000000000 <.comment>: 0: 00 47 43 43 3a 20 [MII] data8 0x101d21a1a38 6: 28 4e 65 74 42 53 (p32) adds r98=7465,r25 c: 44 20 6e 62 data8 0xc4dc4088a6 10: 34 20 32 30 31 38 [-a-] data8 0x1c189819101 16: 31 31 30 39 29 20 data8 0xa4e4c0c4c4 1c: 36 2e 35 2e data8 0x5c6a5c6c40 20: Address 0x0000000000000020 is out of bounds.